Siemens EDA (Siemens Digital Industries Software)

Last month at #62DAC we had the pleasure of hosting leading industry partners in a panel discussion about software-defined systems (SDS), what they mean for the automotive industry and how a paradigm shift is required in the supporting infrastructure. Arm is at the forefront of this shift, and Suraj Gajendra shared his thoughts from this discussion and explains how Arm are pivoting to support SDS and are preparing for AI-defined vehicles. Key takeaways: ✔️ Infrastructure first: SDVs need a comprehensive cloud-to-car ecosystem, built from day one, for continuous innovation ✔️ Virtual platforms accelerate: Arm is cutting development time by up to two years by enabling "day zero" software development on virtual platforms ✔️ China's speed & rigor: New players are driving rapid innovation (12-month design to tape-out) without sacrificing quality or safety ✔️ AI-defined future: Cars are becoming AI-powered. Virtual platforms are crucial for optimizing these complex AI workloads early ✔️ Security built-in: Security isn't an afterthought. It must be integrated into hardware design from the start, enabled by virtual development ✔️ System-level thinking: We're moving beyond components to model entire vehicle ecosystems, finding macro-level problems before they become costly Read the full details via the link in our comments!

mPower-ing on to support chip designers and enhance reliability! 💪 We announced today that we've collaborated with United Microelectronics Corporation (UMC), a leading global semiconductor foundry, to implement our mPower™ software for electromigration (EM) and IR drop analysis, enabling chip designers to optimize performance and enhance reliability. The scalability of mPower enables customers such as UMC to carry out more accurate analysis on larger layouts than ever before and the Transistor-Level Pre-Layout EM and IR Drop capabilities enable early detection of potential issues, allowing designers to optimize chip performance and enhance reliability. 🔑Key benefits gained with the implementation of mPower at UMC: ⌚ Accelerated time-to-market through industry-leading scalability and rapid verification. ✅ Enhanced product reliability through early detection and resolution of potential issues. 🔗 Seamless integration with existing design workflows, enabling comprehensive power analysis. After extensive evaluation, UMC successfully used mPower's automated processes to perform comprehensive SRAM full-chip circuit analysis, delivering precise IR drop distribution assessments and enabling early-stage risk detection. "By integrating Siemens' mPower into our design verification flow, we're enhancing our ability to identify and address potential issues earlier in the development cycle," said Osbert Cheng, vice president of device technology development & design support, UMC. "This aligns perfectly with modern design requirements and helps ensure superior product quality for our customers." Ankur Gupta, our senior vice president and general manager of Digital Design Creation Platform, adds: “Our work with UMC to successfully implement mPower at UMC marks a significant advancement in semiconductor design verification capabilities. As the semiconductor industry addresses the ever-growing challenge of complexity, leaders and pioneers are looking to Siemens’ EDA portfolio to accelerate the design process and help them deliver capable, reliable products to market.” More details in the newsroom - link in comments ⤵️

Up to 75% of chip design projects fall behind schedule 😱 One of the biggest culprits: respins caused by incomplete or inaccurate verification. As the industry pushes toward highly specialized SoCs, design complexity is skyrocketing—and so is the pressure to get it right the first time. That’s where metric-driven verification comes in. By focusing on measurable goals—like code coverage and functional coverage—teams can gain a much clearer picture of where their testing stands and what gaps remain. 💡 At Siemens, the Veloce Coverage and Assertion App makes this process actionable. It delivers: ✔️Code coverage insights (statements, branches, toggles, FSMs) ✔️Functional coverage tracking (coverpoints, covergroups) ✔️Assertion-based debug (when, where, how often assertions fire) ✔️Easy visualization of coverage holes and progress With Veloce, verification becomes smarter, more targeted, and more efficient—helping teams avoid costly respins and hit aggressive tape-out schedules. In a fast-moving market, first-pass silicon isn’t just a goal—it’s a business imperative. #Semiconductors #SoCDesign #Verification #EDA 

Another milestone! We are pleased to share that SK keyfoundry (SK키파운드리), in collaboration with Korea Siemens EDA, has launched a 130nm automotive PDK (Process Design Kit) that is exclusively designed for use in Calibre PERC software. This marks a significant milestone as one of the first Korean domestic established node processes to provide not only schematic verification but also layout verification for interconnect reliability. With this new PDK, a wide range of Korean domestic and international fabless companies can leverage SK keyfoundry’s 130nm process to enhance the design optimization of automotive power semiconductors, while at the same time doing more precise reliability verification. “We are thrilled to introduce the Calibre PERC PDK optimized for 130nm automotive power semiconductor processes in collaboration with Siemens EDA. This PDK is designed to improve design efficiency and reliability, providing our customers with a competitive edge in developing high-performance automotive semiconductor products,” said Ilsup Jin, R&D Senior Vice President, SK keyfoundry. “Moving forward, we plan to continue to strengthen our partnership with Siemens to develop next-generation solutions on established node processes.” “We are pleased to support this Calibre PERC PDK for 130nm processes, enabling highly reliable design verification in collaboration with SK keyfoundry. This solution is expected to help differentiate SK keyfoundry in the power semiconductor and IoT markets,” said Junan (JoonHwan) Kim, our General Manager, Siemens EDA Korea. “Siemens remains committed to expanding its collaboration with foundries so that they can leverage the latest EDA technologies regardless of the process nodes they are offering.” Explore the comments to see what SK keyfoundry has planned next. ⤵️

Exciting #news! Arm, a longtime user of Veloce, has selected our Veloce CS for their Neoverse Compute Subsystems verification and validation and has deployed Veloce Strato CS and Veloce proFPGA as part of the design flow for Arm® Neoverse™ Compute Subsystems (CSS). "Time to market is increasingly in focus for our partner ecosystem and critical to remaining competitive in this era of computing,” stated Karima Dridi, Head of Productivity Engineering, Arm. “A core component of Arm Neoverse CSS is the pre-validation and verification, made possible by adopting innovative new tools like Siemens Veloce CS system, so that our partners can get their silicon solutions to market faster.” Jean-Marie Brunet, our vice president and general manager, Hardware-Assisted Verification, said, “We are delighted to extend our collaboration with Arm to the Veloce CS system. Veloce Strato CS with the Veloce PCIe Composite Device is delivering outstanding emulation performance improvements with unique and demonstrated capacity scaling, and Veloce proFPGA CS with AMD VP1902 Adaptive SoC is providing a fast and scalable prototyping solution. With the Veloce CS system we address the varied challenges faced by hardware, software, and system engineers. Our longstanding relationship with Arm gives us a strong foundation for gauging their needs and the dynamics of their business as market requirements change.” More details are in the comment section, below ⤵️ #EDA #Verification #Silicon

AI is transforming how electronic design teams manage complexity. ✨ At #62DAC, we unveiled our AI-enhanced toolset specifically designed for semiconductor and PCB design environments. “We are strategically investing in developing sophisticated industrial-grade AI solutions purpose-built for the unique complexities of EDA,” Mike Ellow, our CEO, said. “Siemens is set to revolutionize the way design teams operate, ushering in a future where generative and agentic AI capabilities are seamlessly integrated into every aspect of the EDA workflow.” Highlights from an exciting week included: 🗡️ Jayne Alexander, representing the Solido Design Environment team, won first place in the poster gladiator battle for presenting the poster “Accelerating chip design with AI-powered additive learning for deep sub-micron technologies” 🏎️ Visitors to our booth enjoyed an immersive digital twin experience by climbing inside a Ford Mach-E car that simulated real driving, brought to life through our PAVE360 platform 🏭 Our leaders Amit Gupta, Ankur Gupta, AJ Incorvaia, Abhi Kolpekwar and Juan Carlos Rey shared how we're creating industrial-grade AI in EDA powered by NVIDIA in a conversation with John Linford, highlighting how natural language conversations with AI are upending the traditional UX paradigm 📈 In panel discussions and interactive demos, we introduced Aprisa AI, which delivers up to 10x productivity gains and improves compute-time efficiency by 3x; Calibre Vision AI, which revolutionizes design verification by enabling faster identification and resolution of critical violations; and Solido AI, which elevates custom IC development through tailored generative and agentic AI capabilities

Dive deep into the evolution of semiconductor design! 🤝 Join Pratyush Kamal, our Director of R&D for 3D IC Solutions Engineering, as he unravels the complex relationship between microarchitecture and 3D IC design. Key insights include: • How microarchitecture drives critical data flow decisions • The shift from siloed to holistic design approaches • Why tomorrow's 3D ICs demand more than just implementation • Cross-domain expertise in modern chip design Discover how microarchitecture is reshaping the future of 3D IC technology - the link is in the comments.

This week, Rapidus Corporation announced a strategic collaboration with us for semiconductor design and manufacturing processes for the 2nm generation. We'll collaborate to jointly develop a process design kit based on the Calibre platform while Rapidus furthers its design and verification ecosystem. Additionally, together we'll build a reference flow that holistically supports design, verification and manufacturing from front-end to back-end, which will provide a smooth development environment for Rapidus' Rapid and Unified Manufacturing Service. "Our work with Rapidus signifies the deep integration of Siemens' EDA technology into a new manufacturing base. Through the creation of a reference flow utilizing products such as Calibre and Solido, we will jointly build a future of semiconductor manufacturing that excels in reliability, speed, scalability and safety," said Mike Ellow, our CEO of Siemens EDA. Rapidus is creating a new approach that integrates the entire foundry process from design to manufacturing. With the secure management of design data, ensuring manufacturing traceability and reducing information leakage risks through collaboration with EDA providers, Rapidus will strengthen its supply chain reliability. “Rapidus is dedicated to advancing the co-optimization of manufacturing and design and is committed to providing a design environment that dramatically speeds up the realization of customer needs for next-generation semiconductors. Our collaboration with Siemens will embody this mutual optimization, for our Design Manufacturing Co-Optimization concept. Rapidus, as a state-of the-art semiconductor foundry, will dramatically shorten the time to tape-out by achieving MFD for the 2nm gate-all-around process” said Dr. Atsuyoshi Koike, CEO of Rapidus. Want to learn more? Please check the comments below.

📣 We're excited to add not just one but two new solutions to our EDA portfolio! 📣 To help semiconductor design teams address and overcome the complexity challenges associated with the design and manufacture of 2.5D and 3D IC designs, we now offer solutions that together dramatically reduce risk and enhance the design, yield and reliability of complex, next-gen 2.5D/3D IC designs ⤵️ ⭐ Our new Innovator3D IC solution suite enables IC designers to efficiently author, simulate and manage heterogeneously integrated 2.5D/3D IC designs ⭐ Our new Calibre 3DStress software leverages advanced thermo-mechanical analysis to identify the electrical impact of stress at the transistor level. “By delivering a stress-aware multiphysics analysis solution powered by Calibre 3DStress and driven by the Innovator3D IC solution suite, Siemens enables customers to overcome the complexities and risks associated with 3D IC designs,” said Mike Ellow, our CEO, Siemens EDA. “These capabilities are critical for our customers, allowing them to accelerate productivity and meet stringent design timelines by effectively eliminating the barriers of design complexity that traditionally impact design cycles.” What do customers have to say? 🗣️ ► "In 2023, we adopted Siemens’ technology to meet the complex design and integration challenges of our advanced platform solutions. The Innovator3D IC solution suite plays a critical role in enabling the high-performance solutions we deliver to AI and HPC datacenters." - Bryan Black, CEO of Chipletz ► “Siemens EDA’s Calibre 3DStress tool can synthesize the complexity of components, materials and processes related to 3D IC architectures and can create accurate IP-level stress analysis. Using it, ST has been able to implement early design planning and sign-off flows, and accurately model potential electrical failures due to IP-level stress within a 3D IC package. The result is improved reliability and quality, together with a reduced time to market, which provide a win both for ST and our customers.” - Sandro Dalle Feste , APMS Central R&D Senior Director at STMicroelectronics More information about these two new solutions is in the comments!

At the 2025 DAC, The Chips to Systems Conference, we unveiled our AI-enhanced toolset for the EDA design flow. Throughout the event, we're showcasing how #AI can improve productivity, accelerate time to market for the #EDA industry and enable customers to explore innovation opportunities at the rapidly increasing pace demanded by today's market. 1️⃣ We're demonstrating an EDA AI system specifically designed for semiconductor and PCB design environments. This purpose-built system delivers secure, advanced generative and agentic AI capabilities, for unparalleled customization capabilities and seamless integration across the entire EDA workflow. “We are strategically investing in developing sophisticated industrial-grade AI solutions purpose-built for the unique complexities of EDA. This accumulated expertise forms the technological foundation that empowers our customers to bring breakthrough semiconductor and PCB designs to market faster than ever before,” said Mike Ellow, our CEO, Siemens EDA. “Siemens is set to revolutionize the way design teams operate, ushering in a future where generative and agentic AI capabilities are seamlessly integrated into every aspect of the EDA workflow.” 2️⃣Our EDA AI system also supports NVIDIA NIM microservices and NVIDIA Llama Nemotron models. “AI agents can dramatically boost productivity for complex electronic design automation to support engineers across layout optimization, simulation and verification, freeing engineers to focus on creative problem-solving and advanced design challenges,” said Timothy Costa, senior director of CAE and CUDA-X at NVIDIA. “With NVIDIA NIM microservices and Llama Nemotron reasoning models, Siemens EDA can speed the development of tomorrow’s most intricate electronic systems.” 3️⃣ We're enabling AI capabilities across our Siemens EDA portfolio, including with Aprisa AI, Calibre Vision AI, and Solido generative and agentic AI Our EDA AI system is currently available for early access across the Siemens EDA portfolio. Check the comments for more information 👇 #62DAC